Hytec Electronics Ltd.

 PCI 5380 TWO-CHANNEL ROTARY ENCODER INTERFACE WITH UP/DOWN COUNTER

Introduction 

This card is designed to replace the original ISA card designed for the IBM XT computer in 1987 by Tony Cosgrove of Daresbury Lab. Signals from two rotary incremental encoders are received and fed to up/down counters readable from the PCI bus.

Functions

The card uses a PLX Technology PCI9052 bridge chip to handle and decode PCI transactions. The card requests an area of I/O space into which it decodes read and write commands for on-board resources.

The signals from the two encoders in the form of either clock and up/down signals or the raw Phase A and Phase B signals are fed to 24-bit up/down counters formed in an FPGA chip. The counters can be read at any time by the PCI bus. The counters can be cleared to zero by a write command. The maximum rate of counting is 100KHz

Mode of operation

The suggested mode of operation for this system is based on polling. After a power-on-reset or a counter clear command, the counters will read zero. Any movement of the control device will result in the counter incrementing or decrementing. It is proposed that software read the counter at regular intervals, perhaps every 20 milliseconds, to see if the value is non-zero. Once a non-zero value has been detected, the poll should continue until the movement has stopped. The time taken for this will need to be determined by experiment. Once the end of a movement has been noted, the counter can be cleared and the process restarted.

PCI Bus Interface

When the card is fitted into a PC, the BIOS will detect it and assign resources as requested by the card. The resources are in the form of I/O and memory areas (and possibly an interrupt). One of the I/O areas is used for access to the on-board counter. It is the responsibility of the host software to determine the base address for this I/O area using the card’s manufacturer and model identifiers. Hytec’s manufacturer ID is 1196h and the board’s model number ID is 5380h.

The card has four registers in this I/O area, which are the top and bottom halves of the 24-bit counters, starting at the base address. They can be read at any time as a 16-bit value and an 8-bit value, and any write at the lower address will clear the corresponding counter.

Typical Resources:

Mode selection

The user can select either Phase A/Phase B or Clock/direction operation for each channel by using on-board links:

Connections

The card uses the same I/O connection as the old ISA card, which was a 25-way Cannon socket, wired as follows:

Signal Standards

All input signals are standard TTL levels with a 1K ohm pull-up to 5 volts.