|
Hytec Electronics Ltd |
|
PCI-CAMAC Serial Highway DriverPCI 5992 |
 |
Features
Product Description The Hytec PCI 5992 is a single short PCI module plus a passive plug converter box which transmits and receives signals on the CAMAC serial highway whilst being controlled via the PCI BUS. Bit serial and Byte serial ports for data and clock are provided for the transmission of command and the acceptance of reply and demand messages. Serial messages are initiated by loading command and data registers via the PCI bus using 32 bit words. Incoming messages are checked for transverse and longitudinal parity. The serial clock is controlled by a crystal source. The internal oscillator may be divided down from the source to give transmission rates of approximately 1kHz to 5MHz. A twelve–bit ”LAM” Status and ”LAM” mask register–set provide a comprehensive interrupt system which has a separate overall allow interrupt bit. The Lam status register may be cleared or selectively cleared and the Lam mask register can be written, cleared, selectively set and selectively cleared. The mask and all control registers are cleared at power up, or by a PCIbus reset, or by a programmed reset. Operational Features Six registers provide communications between the PCI BUS and the Serial Highway. Message transmission is initiated by: 1. Writing the command register with a serial Read or Command function or:– 2. Writing the Write Data register whilst the Command register contains a serial Write function. Loading the Command register with a serial Write Command does not initiate transmission. The 24 Bit Serial Read Data may be read via the PCI bus as one 32 Bit word after the reply message has been received. Receipt of a reply or otherwise together with the state of the serial SX and SQ may be determined by reading the unit status register (offset – 00). The full status is obtained by reading offset 10. A new transfer should not be set–up until a reply has been received for the previous transmission. Two bits are provided in the command register so that a Q–scan mode may be utilised if the basic parameters, function, crate are the same. The two bits are MQ and MR. If MR is set, then a ’Read” to the module initiates a repeat message. The serial Command sent, isidentical if MQ=0, but is varied if MQ=1 depending on the state of the serial Q(SQ). If SQ=1 then the serial address (SA) is incremented, whereas if SQ=0, SA is reset and the Serial station number (SN) incremented. If SN increments beyond 24, then the crate address is cleared and the new transmission made with crate = 0. This gives address not recognised on receipt back at the PCI 5992 which interrupts terminating the transfer. Timeout If 350mS elapses from the start of a message transmission and there has been no reply or unrecognised command message, the TIMEOUT signal is asserted which sets TMO LAM source. SHR also becomes true (SHR = RPL or TIMEOUT) and the RDY LAM source is set if/when CMD is true. Reply messages received after TIMEOUT is asserted are ignored. Addressing the Module The module is addressed in passthrough mode as a PCI slave with base address set by plug and play. The unit status register (00) contains a booking bit, which is automatically set following a read, if previously unset.
|
| HYTEC
Head Office Post : 5 Cradock Road, Reading, Berkshire, RG2 0JT, England. Phone : +44 (0)118 9757770 Fax : +44 (0)118 9757566 Email : sales@hytec-electronics.co.uk |
HYTEC HOME PAGE
Copyright © 2003 [Hytec Electronics Ltd]. All rights reserved. Information in thisdocument is subject to change without notice. Other products and companies referred to herein are trademarks or registered trademarks of their respective companies or mark holders.send email with questions or comments about this web site.
|