Hytec Electronics Ltd
8-Channel UART Industry Pack IP-SI-8515
Product Description 

The Hytec IP-SI-8515 is a single-width Industry Pack that provides 8 serial interface lines with the following characteristics:- 

  • 8 independent RS-232 UART channels
  • 64 byte Transmit and Receive FIFOs

  • Transmit and Receive FIFO level counters

  • Programmable Tx and Rx FIFO Trigger Levels

  • Automatic RTS/CTS Flow Control

  • Automatic Xon/Xoff Software Flow Control with Status Indication

  • Programmable Data Rate with Prescaler

  • Up to 6.25 Mbps Serial Data Rate

  • Single Interrupt Output for all 8 UARTs

  • Global Interrupt Source for all 8 UARTs

  • Simultaneous UART channel initialisation

Specifications 

Size:                             Single width Industry Pack 1.8ins x 3.9 ins
Operating temp:             0 to 45 deg C ambient
Number of channels:        8
Max. baud rate:             921.6kbps with internal clock.
Data format:                  Binary/ASCII
Input/Output levels:        RS-232
Internal clock:                14.7456MHz oscillator
Clock accuracy:             +/-100ppm (0.01%)       

Power:                          +5V @ 400mA typical

Software Drivers are available including EPICS drivers.

Operating Modes                                                                                                             

Application Registers
There are a number of application specific (I/O) registers.

Interrupt Register (IP address 0)

Read/write register defines the vector V7-V0, Read only interrupt source U7-U0

D15D14D13D12D11D10D09D08D07D06D05D04D03D02D01D00
V7V6V5V4V3V2V1V0U7U6U5U4U3U2U1U0

V0-7      Interrupt vector to be used during IACK
U0-7     Any bit which is set indicates the interrupting UART

Interrupt Source Registers 1-3 (IP address 1-3)

Indicate the source of each interrupt from UART0 to 7 . Bits 8-15 are 0.
Read only register.

D07D06D05D04D03D02D01D00D07D06D05D04D03D02D01D00
U50U42U41U40U32U31U30U22 U21U20U12U11U10U02U01U00
        D07D06D05D04D03D02D01D00
        U72U71U70U62U61U60U52U51

Timer Control Register (IP address 4&5)
Read/write register.

CS-Clock Select S/R-Single/Retrigger SS-Start/Stop IE-Timer Interrupt Enable

D07D06D05D04D03D02D01D00D07D06D05D04D03D02D01D00
000000000000CSS/RSSIE

Timer Counter Register (IP address 6&7)
Read/write register.

Timer counter data register.

D07D06D05D04D03D02D01D00D07D06D05D04D03D02D01D00
D7D6D5D4D3D2D1D0D7D6D5D4D3D2D1D0

8x Mode Register (IP address 8)
Read/write register.

Logic 0 sets 16x sampling. Logic 1 sets 8x sampling

D15D14D13D12D11D10D09D08D07D06D05D04D03D02D01D00
00000000U7U6U5U4U3U2U1U0

Reserved Register (IP address 9)
Read only register.

D15D14D13D12D11D10D09D08D07D06D05D04D03D02D01D00
0000000000000000

Reset Register (IP address A).
Resets are write only

R0-7 reset UART0-7

D15D14D13D12D11D10D09D08D07D06D05D04D03D02D01D00
00000000R7R6R5R4R3R2R1R0

Sleep Register (IP address B)
S0-7 set UART0-7 into sleep mode Read/write register.

D15D14D13D12D11D10D09D08D07D06D05D04D03D02D01